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Apple and Amazon reported starkly contrasting earnings— which one are you bullish on?
牛牛課堂
joined discussion · Jul 20 15:35 ·

AI computing power enters its next battleground: Scale-Up networking could become the new bottleneck—Morgan Stanley highlights four types of optical communication companies worth watching!

Over the past two years, investment in the AI supply chain has been heavily focused on GPUs, HBM, and advanced packaging. NVIDIA has emerged as the biggest winner thanks to its CUDA ecosystem and GPU dominance, while companies like SK Hynix, Taiwan Semiconductor, and Broadcom have also benefited from the expansion of AI infrastructure.
However, as large models continue to scale up,a new bottleneck is emerging:Chips are getting faster, but the speed of data transfer between chips isn't keeping pace.
Morgan Stanley noted in its latest research report that the core of future AI infrastructure competition will shift from the performance of individual chips to the ability to 'make thousands of AI accelerators work together like a single supercomputer.'This is driving a new market: Scale-Up.
Morgan Stanley forecasts that the Scale-Up networking market will reach approximately $73 billion by 2030, more than quadrupling from last year's estimate of $17 billion.
Over the past two years, investment in the AI supply chain has been heavily focused on GPUs, HBM, and advanced packaging. NVIDIA has emerged as the biggest winner thanks to its CUDA ecosystem and GPU dominance, while companies like SK Hynix, Taiwan Semiconductor, and Broadcom have also benefited from the expansion of AI infrastructure. But as large models continue to scale up,a new bottleneck is emerging:Chips are getting faster, but data transfer speeds between chips can’t keep up. In its latest research report, Morgan Stanley points out that the core of future AI infrastructure competition will shift from individual chip performance to the ability to 'make thousands of AI accelerators work together like a single supercomputer.'This is driving a new market: Scale-Up. Morgan Stanley forecasts that the Scale-Up networking market will reach approximately $73 billion by 2030, more than quadrupling its previous estimate of $17 billion last year. Why does stronger AI demand faster interconnects? In traditional data center architectures, servers primarily rely on network connections. But AI training is different. A large-scale model training task often requires thousands of GPUs working simultaneously. If the communication speed between GPUs is insufficient, even increased computational power will be wasted waiting for data transfers. In simple terms: Past AI competition: Who has more GPUs? Future AI competition: Who can enable more GPUs to collaborate efficiently? Morgan Stanley points out that the current bottleneck in AI systems is...
Why does stronger AI require faster interconnects?
In traditional data center architectures, servers are primarily connected via networks.
But AI training is different.
Training a large model often requires tens of thousands of GPUs working simultaneously. If communication speeds between GPUs are insufficient, computational power is wasted waiting for data transfers—even if raw compute capability increases.
In simple terms:
Past AI competition: Who has more GPUs?
Future AI competition: Who can make more GPUs collaborate efficiently?
Morgan Stanley points out that the bottleneck in AI systems is shifting from 'computational power' to 'data movement capability.' A striking data contrast worth noting is:Over the past 30 years, hardware computing power has increased by 6 million times (3x every two years), while interconnect bandwidth has only grown 450-fold (1.6x every two years).This is precisely why NVIDIA continues to enhance its interconnect technologies such as NVLink and NVSwitch.
Over the past two years, investment in the AI supply chain has been heavily focused on GPUs, HBM, and advanced packaging. NVIDIA has emerged as the biggest winner thanks to its CUDA ecosystem and GPU dominance, while companies like SK Hynix, Taiwan Semiconductor, and Broadcom have also benefited from the expansion of AI infrastructure. But as large models continue to scale up,a new bottleneck is emerging:Chips are getting faster, but data transfer speeds between chips can’t keep up. In its latest research report, Morgan Stanley points out that the core of future AI infrastructure competition will shift from individual chip performance to the ability to 'make thousands of AI accelerators work together like a single supercomputer.'This is driving a new market: Scale-Up. Morgan Stanley forecasts that the Scale-Up networking market will reach approximately $73 billion by 2030, more than quadrupling its previous estimate of $17 billion last year. Why does stronger AI demand faster interconnects? In traditional data center architectures, servers primarily rely on network connections. But AI training is different. A large-scale model training task often requires thousands of GPUs working simultaneously. If the communication speed between GPUs is insufficient, even increased computational power will be wasted waiting for data transfers. In simple terms: Past AI competition: Who has more GPUs? Future AI competition: Who can enable more GPUs to collaborate efficiently? Morgan Stanley points out that the current bottleneck in AI systems is...
What is Scale-Up, and why has it become the new battleground for AI infrastructure?
Scale-Up and Scale-Out are often confused. Simply put, Scale-Up enables multiple GPUs/XPUs within a single high-speed interconnect domain to work together like one larger computer, emphasizing low latency, high bandwidth, and memory semantics; Scale-Out connects multiple servers or compute domains, resembling traditional data center networking more closely.
Over the past two years, investment in the AI supply chain has been heavily focused on GPUs, HBM, and advanced packaging. NVIDIA has emerged as the biggest winner thanks to its CUDA ecosystem and GPU dominance, while companies like SK Hynix, Taiwan Semiconductor, and Broadcom have also benefited from the expansion of AI infrastructure. But as large models continue to scale up,a new bottleneck is emerging:Chips are getting faster, but data transfer speeds between chips can’t keep up. In its latest research report, Morgan Stanley points out that the core of future AI infrastructure competition will shift from individual chip performance to the ability to 'make thousands of AI accelerators work together like a single supercomputer.'This is driving a new market: Scale-Up. Morgan Stanley forecasts that the Scale-Up networking market will reach approximately $73 billion by 2030, more than quadrupling its previous estimate of $17 billion last year. Why does stronger AI demand faster interconnects? In traditional data center architectures, servers primarily rely on network connections. But AI training is different. A large-scale model training task often requires thousands of GPUs working simultaneously. If the communication speed between GPUs is insufficient, even increased computational power will be wasted waiting for data transfers. In simple terms: Past AI competition: Who has more GPUs? Future AI competition: Who can enable more GPUs to collaborate efficiently? Morgan Stanley points out that the current bottleneck in AI systems is...
Morgan Stanley believes the core drivers of Scale-Up market growth stem from three factors:
1. Expansion of AI cluster scale
2. Increase in GPU count
3. Rising communication complexity of AI models
This means: In the past, investing in AI meant focusing on GPUs.In the future, investing in AI will mean focusing on the 'highways between GPUs.'
Copper vs. optical: which path to choose?
Morgan Stanley’s view on the debate over transmission media can be summed up in one sentence:"Use copper whenever possible; only use optical when absolutely necessary."
For short-distance connections, copper still holds three hard-to-replace advantages:low latency, low power consumption, and low cost. The so-called 'copper wall' doesn't mean copper suddenly fails—it refers to the fact that high-speed electrical signals attenuate as distance increases.
According to this logic, copper will remain the dominant solution through 2026–2027.Passive DAC is suitable for the shortest distances; ACC improves power consumption and latency through analog compensation; AEC incorporates a retimer and clock recovery to extend reach, albeit at higher power and cost. These solutions will coexist long-term within and near racks. The real trigger for optical migration isn't just higher speeds, but the convergence of four conditions: Scale-Up domains spanning multiple racks, rising electrical I/O power consumption, insufficient front-panel bandwidth density, and continuously increasing model communication intensity.
Therefore, Rubin Ultra is more likely to adopt a hybrid architecture: using copper NVLink within racks and optical interconnects between racks. The Feynman generation may be the first to implement all-optical Scale-Up at meaningful scale, but considering product ramp-up and supply chain scaling,the inflection point for commercially meaningful CPO adoption is more likely around 2029 rather than immediate widespread deployment upon its 2028 launch.
Over the past two years, investment in the AI supply chain has been heavily focused on GPUs, HBM, and advanced packaging. NVIDIA has emerged as the biggest winner thanks to its CUDA ecosystem and GPU dominance, while companies like SK Hynix, Taiwan Semiconductor, and Broadcom have also benefited from the expansion of AI infrastructure. But as large models continue to scale up,a new bottleneck is emerging:Chips are getting faster, but data transfer speeds between chips can’t keep up. In its latest research report, Morgan Stanley points out that the core of future AI infrastructure competition will shift from individual chip performance to the ability to 'make thousands of AI accelerators work together like a single supercomputer.'This is driving a new market: Scale-Up. Morgan Stanley forecasts that the Scale-Up networking market will reach approximately $73 billion by 2030, more than quadrupling its previous estimate of $17 billion last year. Why does stronger AI demand faster interconnects? In traditional data center architectures, servers primarily rely on network connections. But AI training is different. A large-scale model training task often requires thousands of GPUs working simultaneously. If the communication speed between GPUs is insufficient, even increased computational power will be wasted waiting for data transfers. In simple terms: Past AI competition: Who has more GPUs? Future AI competition: Who can enable more GPUs to collaborate efficiently? Morgan Stanley points out that the current bottleneck in AI systems is...
Therefore, the industry will not leap directly from pluggable optical modules to full CPO (Co-Packaged Optics), but will instead pass through multiple intermediate stages. NPO (Near-Package Optics) places the optical engine near the ASIC but still outside the package, striking a balance among efficiency, openness, and serviceability; LPO (Linear Drive Pluggable Optics) reduces or eliminates the DSP to lower module power consumption; 2.5D CPO initially brings chiplets closer to the optical engine, with full 3D CPO unlikely to emerge before 2030. OCS (Optical Circuit Switching), meanwhile, bypasses per-packet electronic switching and directly connects ports via optical paths, making it suitable for scenarios with predictable traffic patterns and infrequent reconfiguration. AWS’s new RNG network even attempts to reduce equipment count and energy consumption through a flatter quasi-random topology, passive optical components, and adaptive routing.
Thus, future data centers will not rely on a single interconnect medium, but will instead adopt a heterogeneous network architecture layered by distance, power consumption, cost, latency, and serviceability: copper will be used as much as possible within boards and racks, NPO/CPO gradually introduced between racks, OCS deployed in specific stable high-traffic scenarios, and pluggable optical modules continuing to handle general-purpose connectivity.Copper and optics are not in a simple substitution relationship; rather, they are being re-divided based on different physical boundaries.
Industry Opportunities: First Assess 'Certainty,' Then Evaluate 'Flexibility'
Over the past two years, investment in the AI supply chain has been heavily focused on GPUs, HBM, and advanced packaging. NVIDIA has emerged as the biggest winner thanks to its CUDA ecosystem and GPU dominance, while companies like SK Hynix, Taiwan Semiconductor, and Broadcom have also benefited from the expansion of AI infrastructure. But as large models continue to scale up,a new bottleneck is emerging:Chips are getting faster, but data transfer speeds between chips can’t keep up. In its latest research report, Morgan Stanley points out that the core of future AI infrastructure competition will shift from individual chip performance to the ability to 'make thousands of AI accelerators work together like a single supercomputer.'This is driving a new market: Scale-Up. Morgan Stanley forecasts that the Scale-Up networking market will reach approximately $73 billion by 2030, more than quadrupling its previous estimate of $17 billion last year. Why does stronger AI demand faster interconnects? In traditional data center architectures, servers primarily rely on network connections. But AI training is different. A large-scale model training task often requires thousands of GPUs working simultaneously. If the communication speed between GPUs is insufficient, even increased computational power will be wasted waiting for data transfers. In simple terms: Past AI competition: Who has more GPUs? Future AI competition: Who can enable more GPUs to collaborate efficiently? Morgan Stanley points out that the current bottleneck in AI systems is...
According to Morgan Stanley’s research report, the companies can be categorized into four main groups:
The first category consists of platform and switch chip vendors. $NVIDIA (NVDA.US)$ They capture the greatest value in closed systems through GPUs, NVLink, and NVSwitch; $Broadcom (AVGO.US)$ They also cover custom ASICs, Ethernet switching, PCIe, SerDes, NICs, and optics, enabling them to bundle and sell networking capabilities as customers move from chip design to full rack deployment. $Marvell Technology (MRVL.US)$ Simultaneously betting on UALink, ESUN, NVLink Fusion, and silicon photonics offers the broadest coverage, but acquisition integration and mass production at scale are key risks.
The second category comprises copper interconnect and connectivity chip vendors. $Astera Labs (ALAB.US)$ Entering Trainium via Scorpio PCIe switch chips while retaining optionality for UALink and NVLink Fusion; $Credo Technology (CRDO.US)$ Benefiting from the extended lifespan of AEC, while expanding into optical DSPs and optical modules; $Semtech (SMTC.US)$ Pursuing both low-power active copper and linear optics simultaneously. Their shared rationale is that even if optics ultimately prevail, copper will remain viable within racks for several more product generations, meaning the cash flow window has not yet closed.
The third category includes optical component and materials suppliers. $Lumentum (LITE.US)$$Coherent (COHR.US)$ and $Corning (GLW.US)$ They have exposure across lasers, optical components, fiber arrays, and polarization-maintaining fiber. For these companies, the critical variable isn’t whether the final form factor is called CPO or NPO, but whether the amount of optical content per GPU increases. The research report’s sensitivity analysis also shows that 2028 earnings are highly sensitive to both Scale-Out and Scale-Up adoption rates, indicating that optical stocks will remain significantly influenced in the near term by production timelines and deviations from consensus expectations.
The fourth category consists of architecture-agnostic test and measurement vendors.The greater the number of protocols, the higher the data rates, and the shorter the R&D cycles, the more complex the validation combinations become. $Keysight Technologies (KEYS.US)$ Rather than betting on a single interconnect standard, they benefit from the parallel advancement of 800G volume production, 1.6T development, and 3.2T planning. This 'complexity tax' is often more certain than predictions tied to any single technology path, which is also a key reason Morgan Stanley upgraded their rating.
What should investors focus on most?
The greatest value of this research report lies in reframing the market debate from 'whether CPO will exist by 2028' to two more critical questions: Will the Scale-Up domain continue to expand? And will the interconnect content per accelerator unit keep increasing? As long as the answers remain affirmative, structural growth opportunities will persist in networking, copper interconnects, optics, and testing markets. A delay in CPO adoption in any given quarter is more likely to shift revenue recognition timing rather than undermine the long-term trajectory.
However, investors should also be wary of three types of risks.
First, the $73 billion figure is a forward-looking projection based on capital expenditure, accelerator shipments, and cluster architecture—it does not represent realized revenue.Any slowdown in AI-related capital spending, improvements in model efficiency, or suboptimal cluster utilization could all suppress market size.
Second, technological content value does not equate to corporate profitability.Although Scale-Up Ethernet represents a large market, its switching software may be simpler than traditional networking stacks, and white-box hardware could compress branded vendors’ margins. While CPO increases optical content, it may also concentrate value within ASIC platforms and advanced packaging segments. An expanding revenue pool does not necessarily mean every participant’s pricing power improves in tandem.
Third, fragmented technology roadmaps create both opportunities—such as in testing and multi-platform support—and risks, including R&D waste, inventory exposure, and customer concentration.If UALink is delayed, beneficiaries might pivot toward Ethernet and NVLink Fusion; if copper interconnects are further extended, optical revenue could be pushed out; and if CPO yield and repair issues remain unresolved, the lifecycles of NPO and pluggable solutions could be significantly prolonged.
In summary, competition in AI systems is shifting from 'the most powerful chip' to 'the least waiting time.'
In the previous phase of the AI race, the core question was who could provide more computing power; in the next phase, the core question will shift to who can keep that computing power operating continuously, synchronously, and efficiently. The essence of Scale-Up networking is to transform a cluster of independent chips into a single logical supercomputer.
This is also why the networking market will be larger than initially anticipated: the increase in GPU count is merely superficial—the real shift lies in system architecture scaling from single servers to entire racks, and then across multiple racks. In the short term, copper will retain dominance within racks thanks to its advantages in cost, power consumption, and latency. In the medium term, open protocols will foster new ecosystems around non-NVIDIA XPUs. In the long term, once inter-rack distance, I/O power consumption, and bandwidth density cross critical thresholds, optics will no longer be an optional upgrade but a necessary condition for further system scaling.
Therefore, the most accurate assessment isn’t 'copper will be replaced by optics,' but rather: copper will last longer than the market expects, and optics will become unavoidable sooner than skeptics anticipate. What truly merits tracking isn’t a specific product launch date, but the scale of the Scale-Up domain, the interconnect bandwidth per XPU, and the pace at which value migrates from pluggable modules toward optical engines, silicon photonics, advanced packaging, and testing segments.
Risk Disclaimer: The above content only represents the author's view. It does not represent any position or investment advice of Futu. Futu makes no representation or warranty.Read more
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