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Sector Deep Dive | Wafer fabs & memory manufacturers accelerate capacity expansion, boosting semiconductor equipment sector

Wafer and memory manufacturers are increasing capital expenditures, benefiting semiconductor equipment suppliers

💡Core insight

Free cash flow is shifting from hyperscale cloud providers to semiconductors and further cascading into semiconductor equipment—a fundamental asset repricing driven by technology-driven inflation spreading upstream toward manufacturing bottlenecks.This round of revenue growth is underpinned by three converging trends: advanced logic nodes, advanced packaging, and 3D-stacked memory chips continue to drive higher wafer equipment demand; rising process complexity enables leading players to command pricing power and premiums within an oligopolistic landscape; and a growing share of advanced equipment further optimizes product mix and enhances margins.

The WFE market is expected to enter a highly predictable, three-year upcycle from 2026 to 2028, with the equipment segment positioned to benefit first.The memory segment, having exercised restraint in capacity expansion over the past few years, now shows the greatest elasticity in this expansion cycle; equipment orders typically lead chip shipments by 1–2 years,Equipment makers are the first segment across the entire supply chain to receive 'real cash.'Key beneficiaries include $Applied Materials (AMAT.US)$、 $Lam Research (LRCX.US)$ and $Tokyo Electron Device (2760.JP)$ 。

🔍 I. The Current WFE Cycle

1.1 Capital Expenditure Outlook for Major Cloud Providers

The four major North American cloud providers have collectively raised their 2026 capital expenditure guidance,with a combined guidance of approximately $710 billion, up 73.2% year-over-year.Of this, Amazon plans around USD 200 billion, Microsoft approximately USD 190 billion, Google USD 18–19 billion, and Meta USD 12.5–14.5 billion. Capex is expected to remain elevated in 2027 as well. Between 50% and 70% of these funds will be directly allocated to AI server procurement, with GPUs and custom ASICs as the core cost components. These massive purchase orders are directly fueling explosive growth at NVIDIA, Broadcom, and AMD.

Meanwhile, all AI chips require HBM (high-bandwidth memory), and the HBM market is expected to grow from $35 billion in 2025 to100 billion US dollars. The three HBM manufacturers (SK Hynix, Samsung, and Micron) need to significantly expand their own production lines. Taiwan Semiconductor’s most advanced process nodes (4nm → 3nm → 2nm) also require CoWoS advanced packaging, with CoWoS area doubling generation by generation, making it the most critical bottleneck across the entire supply chain. Of wafer fab capital expenditures (Capex),70%-80%is allocated to equipment purchases, representing the terminal implementation phase of the entire investment transmission chain.

1.2 Wafer Fab Capital Expenditure Overview

Driven by wafer fab capital expenditures, the global wafer fabrication equipment (WFE) market is currently in a strong upcycle fueled by the essential demand for AI computing power. Recently, major institutions and leading equipment suppliers have frequently revised upward their market outlook for 2026–2028:The WFE market is projected to reach $140–150 billion in 2026 (with year-over-year growth revised upward to 20%–28%); in 2027, it will further surge to $170–190 billion (year-over-year growth of 20%–29%).；In 2028, it will still maintain robust growth of 10%–16%.Current market valuations have already begun reflecting this highly certain, three-year upcycle.

Starting in 2026, wafer fabs such as Micron, Intel, and Taiwan Semiconductor are rapidly transitioning from the 'large-scale construction and cleanroom build-out' phase to the 'core equipment installation and capacity ramp-up' phase, directing more capital expenditure toward equipment. For example, at Taiwan Semiconductor, equipment spending accounted for 42% of total capital expenditures in Q1 2026, and in Q2 itjumped to 67.1%.; Intel is also prioritizing equipment and the ramp-up of its 14A node in its 2026 capital expenditure, with 2027 capex expected to be even more optimistic.

Recently, the South Korean government announced plans to build a new memory chip cluster in the southwestern region, as Samsung disclosedKRW 245 trilliona long-term domestic investment plan, marking the largest expansion in decades for South Korea’s semiconductor industry. Samsung will invest a total of KRW 245 trillion domestically over the next 15 years (2026–2040), of which approximatelyKRW 210 trillionwill go toward the semiconductor sector, accounting for76%: KRW 165 trillion allocated to existing fabs and ongoing projects (including the completion of the Yongin Fab 6, whose timeline has been moved forward from 2047to2040); KRW 40 trillion for two new fabs in Gwangju; and KRW 5.6 trillion for a new HBM fab, further extending the current semiconductor equipment cycle.

Chart 1: Global Semiconductor Equipment Shipment Cycle

Source: Publicly available data

1.3 Equipment segment benefits first during capacity expansion cycles

The true bottleneck in current AI infrastructure lies in the underlying memory/storage layer. AI training, inference, and vector databases continuously consume high-capacity DRAM, NAND, and HBM. Average selling prices (ASPs) are trending upward, and long-term agreements have locked in future demand and pricing, reducing cyclicality. This provides memory manufacturers with sufficient free cash flow to fund capacity expansions and strong incentives to do so. When foundry gross margins recover and stabilize above 35%, capital expenditures will accelerate significantly, driving equipment demand.

Equipment suppliers are the first to receive 'real cash': Memory makers must first place orders with equipment vendors—ranging from lithography tools (ASML), deposition systems (ASM International/Applied Materials), etch tools (Lam Research), to packaging equipment (ASMPT). Equipment orders typically lead chip shipments by 1–2 years. The full process—from equipment delivery, fab installation and debugging, yield ramp-up, to volume chip production—takes at least 12–18 months.

This equipment cycle is longer: Even if memory chip prices decline, already-placed equipment orders still need to be fulfilled. Moreover, ongoing technological advancements—such as HBM scaling from 8 layers to 12 and then 16 layers, and 3D NAND moving from 200 layers to over 300 layers—continuously generate new equipment demand. Both wafer equipment intensity and per-unit-capacity equipment value keep rising. Only with ample HBM/DRAM supply can AI servers be assembled and shipped at scale. Current HBM capacity is still ramping up; once memory supply becomes sufficient, cloud providers will accelerate AI server deployments.

🔍 II. Core Investment Thesis

2.1 Wafer fabrication segment

Semiconductor chip manufacturing is primarily divided into two major stages: front-end processes (wafer fabrication) and back-end processes (packaging and testing). The front-end process involves hundreds of complex steps, with three core techniques being: photolithography (the most critical step, which precisely transfers circuit patterns onto the wafer surface through exposure, photoresist coating, and development), etching (primarily using plasma-based dry etching, requiring over 100 steps to form fine structures on the wafer), and thin-film deposition (using technologies such as PVD/CVD to create conductive or insulating layers).

After wafer fabrication is completed, the back-end process begins, sequentially involving wafer thinning/dicing, die attach, wire bonding, and molding, followed by final wafer-level or Known Good Die (KGD) testing to ensure chip performance and reliability meet specifications before shipment.

2.2 Front-End Processes

Front-end wafer fabrication equipment accounts for nearly 90% of total semiconductor equipment investment. As Moore's Law slows, further improvements in chip performance increasingly rely on three-dimensional structures (such as GAA transistors in logic chips and 3D NAND in memory chips) and material innovations, significantly increasing process complexity and making equipment investment essential.Etch and thin-film deposition equipment represent the two highest-value segments within front-end processes, together accounting for more than 40% of front-end equipment value.(Thin-film deposition accounts for 23%, and etching accounts for 21%.) Advanced nodes not only drive an increase in the number of tools required but also lead to a sharp rise in demand for high-end equipment.

Exhibit 2: Global Semiconductor Equipment Shipment Cycle

Source: Publicly available data

2.3 Dual Drivers: Wafer Equipment Volume and Process Complexity

The core growth driver for front-end equipment lies in the dual forces of 'a surge in process steps driving absolute equipment volume expansion' and 'rising technical barriers elevating the per-unit value of equipment.'As Moore's Law approaches physical limits, chip architectures are evolving from planar to 3D structures (e.g., FinFET/GAA for logic chips and 3D NAND for memory chips), and with each new process node beyond 22nm,the number of process steps increases by approximately 20% on average.The lengthening of process steps directly translates into higher equipment procurement volumes, while the extreme demands for processing precision grant core equipment suppliers greater pricing power.

From the perspective of actual fab capital expenditures, advanced-node equipment investment exhibits a striking multiplier effect: at the 28nm node, the equipment investment per 10,000 wafers per month of capacity is approximately USD 640 million;by the time the industry reached the 5nm node, capital expenditure for equivalent capacity surged to over USD 3 billion—more than four times that of the 28nm node.Taking Taiwan Semiconductor as an example, the equipment cost to add 1,000 wafers per month (1k WPM) of advanced capacity has rapidly risen from USD 156 million in 2023 toUSD 241 millionin 2025, and is expected to furtherapproach USD 289 millionby 2027 as technology architectures continue to evolve. Memory production lines are seeing similar cost increases: as DRAM processes advance to the 1β node and 3D NAND stacking exceeds 200 layers, equipment investment per 10,000 wafers per month of new capacity has also risen significantly.Increased to approximately USD 900 million。

Driven by both process complexity and equipment intensity, value allocation is highly concentrated in the core steps that address the challenges of 3D structure formation—etching and thin-film deposition.For advanced equipment such as high-aspect-ratio etching (HAR), atomic-layer etching (ALE), and atomic layer deposition (ALD), technological barriers directly determine yield, granting relevant platform-type equipment suppliers significant structural pricing premiums.

💡 III. Company Highlights

3.1 $Applied Materials (AMAT.US)$

Applied Materials is the most comprehensively equipped platform company among semiconductor equipment manufacturers, with core strengths spanning thin-film deposition (CVD/PVD/ALD), chemical mechanical planarization (CMP), and ion implantation.It holds over 30% global market share in thin-film deposition, solidly ranking first in the industry. The company operates two core business segments: Semiconductor Systems and AGS (Applied Global Services). Driven by AI, its Semiconductor Systems business has become the primary growth driver, offering equipment that covers the entire front-end wafer fabrication and back-end advanced packaging chain, making it the only global equipment manufacturer—excluding lithography tools—with the most complete process coverage.

As Moore's Law slows in the lithography dimension, bottlenecks in chip performance improvements have effectively shifted to 3D architectures (e.g., GAA, backside power delivery) and materials innovation (deposition, etching), which demand higher levels of process integration. Applied Materials benefits significantly from its platform advantage and stands as a key beneficiary in advanced process nodes.

3.2 $Lam Research (LRCX.US)$

Lam Research is the dominant global supplier of front-end semiconductor process equipment and theundisputed leader in conductor etch equipment (ranked #1 by market share), and it ranks second globally in the deposition segment. Revenue consists of two main segments: Systems (approximately 62% of revenue), which includes etch, deposition, and cleaning equipment; and Customer Support Business Group (CSBG, approximately 38% of revenue), which leverages a vast installed base of over 100,000 tools worldwide and encompasses spare parts, services, equipment upgrades, and the Reliant product line—characterized by high margins, strong cash flow, and recurring revenue. CSBG recently reported quarterly revenue of $2.1 billion, serving as a high-quality ballast that smooths out cyclical volatility in the semiconductor industry.

Thanks to improved manufacturing efficiency and a higher proportion of high-value-added products, the company’s gross margin has risen above 50%, up from 47.13% in 2023, and has remained stable at this level.(reaching 50.01% in 2025).

3.3 $Tokyo Electron (8035.JP)$

Tokyo Electron (TEL) is the world’s fourth-largest semiconductor equipment manufacturer, with products covering four critical process steps in semiconductor fabrication.It holds a dominant market share of approximately 90% in track lithography equipment.In dry etch, it commands a global market share of roughly 25%–30%, second only to Lam Research. The company’s etch tools offer differentiated advantages in 3D NAND cold etch and HBM TSV applications, benefiting from logic foundries’ technology node migrations, increasing NAND layer stacking, and DRAM process shrinks.As wafer manufacturers continue to increase capital spending on advanced chips, TEL’s profitability is expected to further improve, along with potential market share gains.FY27 revenue from track lithography equipment is expected toincrease by more than 50%,and an optimized yen-based pricing strategy could also help improve gross margins.

Chart 3: Company Valuation Table

Source: Compiled by Futu Securities

[Investment Advisory Information]

Sun Bihan, Licensed Representative, Central Entity Reference Number: BWS708

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